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REVISION HISTORY
REVISION HISTORY
Revision
Date
Description of Changes
1.0
2.0
3.0
5/2010
7/2010
9/2010
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?
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Initial Release
Changed PN to MC10XS3535PNA
Changed classification to Advance Information
Added Minimum Output Current Reported in CSNS for OUT[2-4] (15) to Table 3.
Added Minimum Output Current Reported in CSNS for OUT[1,5] (15) to Table 3.
Added Minimum Output Current Reported in CSNS for OUT[2-4] in LED Mode (15) to Table 3.
Added Minimum Output Current Reported in CSNS for OUT[1,5] in LED Mode (15) to Table 3.
Added Note: Output current value computed after leakage current removal (open load condition) to
Table 3.
4.0
5.0
6.0
7.0
8.0
9.0
5/2011
4/2012
6/2012
12/2012
3/2013
4/2013
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?
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?
?
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Added Under-voltage Deglitch Time parameter.
Added Orderable Part Number PC10XS3535HFK
Corrected errors in Table 11 and Table 14
Removed MC10XS3535PNA from the ordering information and changed PC10XS3535HFK to
MC10XS3535HFK.
Added (4)
Updated Under-voltage Deglitch Time t UV parameter in Table 5, Dynamic Electrical Characteristics
on page 15
Updated Freescale form and style
Added “if V BAT was previously in the nominal voltage range for at least 35 ? sec” to Loss of V BAT
Section.
Added MC10XS3535DHFK to the ordering information.
Added MC10XS3535JHFK to ordering information.
Added 98ASA00426D package information.
Clarified MC10XS3535JHFK in Table 1 and in Packaging Dimensions
Revised back page. Updated document properties. Added SMARTMOS sentence to first
paragraph.
10
8/2013
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?
?
Changed CSNS conditions for CSNS Tri-state Leakage Current
Changed upper and lower limits for Driver Output Matching Time (t DLY(ON) - t DLY(OFF) ) @
Output = 50% V BAT with V BAT = 14 V, f PWM = 240 Hz, ? PWM = 50%, @ 25 °C
Corrected conditions for FETIN Leakage Current when external current switch sense is enabled
MC10XS3535
Analog Integrated Circuit Device Data ?
Freescale Semiconductor
51
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